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10M16DCF256I7G

  • In Stock: 1878
  • Available: 1828

Reference Price(In US Dollars)

QtyUnit PriceExt.Price
1+US $431.20500US $431.21
10+US $373.71100US $3737.11
30+US $339.21460US $10176.44
100+US $310.46760US $31046.76
500+US $301.84350US $150921.75
1000+US $287.47000US $287470.00

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  • Description
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Description
Description Intel® MAX® 10 devices are single-chip, non-volatile low-cost programmable logic devices (PLDs) to integrate the optimal set of system components.
The highlights of the Intel MAX 10 devices include:
• Internally stored dual configuration flash
• User flash memory
• Instant on support
• Integrated analog-to-digital converters (ADCs)
• Single-chip Nios II soft core processor support Intel MAX 10 devices are the ideal solution for syst
Features Technology 55 nm TSMC Embedded Flash (Flash + SRAM) process technology Packaging 
• Low cost, small form factor packages—support multiple packaging technologies and pin pitches
• Multiple device densities with compatible package footprints for seamless migration between different device densities
• RoHS6-compliant  Core architecture 
• 4-input look-up table (LUT) and single register logic element (LE)
• LEs arranged in logic array block (LAB)
• Embedded RAM and user flash memory
• Clocks and PLLs
• Embedded multiplier blocks
• General purpose I/Os Internal memory blocks 
• M9K—9 kilobits (Kb) memory blocks
• Cascadable blocks to create RAM, dual port, and FIFO functions User flash memory (UFM) 
• User accessible non-volatile storage
• High speed operating frequency
• Large memory size
• High data retention
• Multiple interface option Embedded multiplier blocks 
• One 18 × 18 or two 9 × 9 multiplier modes
• Cascadable blocks enabling creation of filters, arithmetic functions, and image processing pipelines ADC 
• 12-bit successive approximation register (SAR) type
• Up to 17 analog inputs
• Cumulative speed up to 1 million samples per second ( MSPS)
• Integrated temperature sensing capability Clock networks 
• Global clocks support
• High speed frequency in clock network Internal oscillator Built-in internal ring oscillator PLLs 
• Analog-based
• Low jitter
• High precision clock synthesis
• Clock delay compensation
• Zero delay buffering
• Multiple output taps General-purpose I/Os (GPIOs) 
• Multiple I/O standards support
• On-chip termination (OCT)
• Up to 830 megabits per second (Mbps) LVDS receiver, 800 Mbps LVDS transmitter
Alternatives

Functional Equivalent (FE) materials, including Fused Filament Fabrication (FFF) form, assembly, and functionally compatible substitute materials.

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